Consultant for digital design and verification

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70565 Stuttgart
06.11.2018

Kurzvorstellung

Highly proficient Digital Design and Verification Engineer with many years experience in design and verification of digital systems, boards and ICs (ASICs, SoCs, FPGAs). Enjoys resolving challenging issues and dedicated to high quality standards.

Ich biete

Technik, Ingenieurwesen
  • Elektronik

Projekt‐ & Berufserfahrung

see my CV
Kundenname anonymisiert, see my CV
4/1981 – offen (37 Jahre, 8 Monate)
various industrial segments
Tätigkeitszeitraum

4/1981 – offen

Tätigkeitsbeschreibung

see my CV for full details

Eingesetzte Qualifikationen

Elektronik

Ausbildung

Electronic engineering
(M.Sc. in Electrical and Electronic Engineering: Communication Systems option)
Jahr: 1983
Ort: Birmingham, England

Qualifikationen

ASIC: complete Front-End flow, partitioning, chip integration, scripting
FPGA: Xilinx (Spartan, Virtex, Kintex), Altera (Cyclone, Stratix), integrated design flow from design entry to debugging and device configuration, Architecture-specific optimisation, Rapid-prototyping, re-targeting, integration in target system
Methodologies: design-for-reuse and platform-based design methodologies, verification methodologies (emulation-accelerated, In-Circuit-Emulation, coverage-driven)
System: architecture, modularisation, timing synchronisation, system integration
EDA-tools: Mentor Graphics, Synopsys, Cadence, Xilinx ISE, Altera Quartus
Design flow: Proof-of-concept, micro-architecture definition, RTL design (VHDL), Design Rule Checking (DRC, linting tools), simulation, synthesis, timing analysis, implementation & testing
Verification flow: Functional Verification, Verification strategy definition, Verification and Test Plans, Verification Environment architecture & implementation, Testbench development, Code coverage, VHDL, e/Specman, Coverage-Driven and Constrained-Random verification, Assertion-Based Verification (ABV), PSL, OVL, Component Modelling, Hardware-Accelerator-assisted verification, Emulator-based verification
Excellent analytical skills, paying attention to detail without losing focus of the targets
Highly capable of independent work, but also a good communicator, enjoying collaborative work in teams
Consulting: Accomplished consultant, having worked with many large multinational companies and established as a valued partner in achieving productivity improvements
Technologies: VHDL, Verilog, SystemVerilog, PSL, Tcl/Tk, e/Specman, Xilinx, Altera, ISE, Quartus, Mentor, ModelSim, Precision, HDL Designer Series, Synopsys, VCS, Design Compiler, Cadence, ARM, AMBA, DSP, Denali, FlexRay, Emulation incl. In-Circuit-Emulation (ICE), GSM, ATM, Wireless CDMA (WCDMA), LTE, USB, USB-on-the-Go, driving and flight simulation, 8- to 64-bit RISC and CISC processors, microcontrollers, Computer Graphics, single-board computer design, VME/VSB, PLDs, multi-processor architectures, Cache memory systems, component modelling, bit-slice architectures, high-speed serial communications, 3D real-time Image Generation, real-time fault-tolerant systems

Über mich

I have over 35 years of experience in the design and verification of digital systems. These have included the architecture of entire systems, design of board-level products and, in the past 28 years, integrated circuits, FPGAs and ASICs.
My CV includes details of my experience and expertise which would be too difficult to try and list here.
Please contact me if you would like me to send you a copy. References from past work positions are also available upon request.

Persönliche Daten

Sprache
  • Englisch (Muttersprache)
  • Griechisch (Muttersprache)
  • Deutsch (Gut)
  • Französisch (Gut)
Reisebereitschaft
auf Anfrage
Arbeitserlaubnis
  • Europäische Union
Profilaufrufe
487
Alter
59
Berufserfahrung
37 Jahre und 7 Monate (seit 04/1981)
Projektleitung
3 Jahre

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