freiberufler SciCaTec - FPGA SoC Development, Embedded System Architecture, Signal Processing, Video Processing, and Image Processing auf freelance.de

SciCaTec - FPGA SoC Development, Embedded System Architecture, Signal Processing, Video Processing, and Image Processing

zuletzt online vor 8 Tagen
  • auf Anfrage
  • 70499 Stuttgart
  • Weltweit
  • de  |  en
  • 27.03.2024

Kurzvorstellung

I am specialized in Signal Processing, Video Processing and Image Processing applications based on FPGAs and SoCs with highest throughput and lowest latency.

My website: -Hyperlink entfernt-

Qualifikationen

  • Bildverarbeitung
  • C++
  • Eingebettete Systemarchitektur
  • Embedded Linux
  • Embedded Systems
  • Field Programmable Gate Array (FPGA)
  • MATLAB / Simulink
  • ModelSim (Mentor Graphics)
  • Verilog HDL
  • VHDL (VHSIC Hardware Description Language)

Projekt‐ & Berufserfahrung

Expert FPGA Developer Signal Processing, customized Algorithms
Research Institution (Headquarter in Germany), Deutschland
12/2022 – 12/2023 (1 Jahr, 1 Monat)
Hochschulen und Forschungseinrichtungen
Tätigkeitszeitraum

12/2022 – 12/2023

Tätigkeitsbeschreibung

I was designing, implementing, and testing FPGA-SoC designs for a diverse set of Intel FPGASoC.
The application was related to high reliable communication over high distances and with throughputs over 10 GBit/s.

Eingesetzte Qualifikationen

Field Programmable Gate Array (FPGA), ModelSim (Mentor Graphics), Python, Signalverarbeitung

Senior FPGA Developer Signal and Image Processing
International established Company (Headquarter in, Deutschland
6/2021 – 10/2022 (1 Jahr, 5 Monate)
Automobilindustrie
Tätigkeitszeitraum

6/2021 – 10/2022

Tätigkeitsbeschreibung

I was involved in the high-precision 3D point cloud measurement of the environment in LiDAR Application. I implemented the high throughput Signal, Image and Video Processing designs in an Xilinx Zynq Ultrascale+ MPSoC FPGA.

Eingesetzte Qualifikationen

Bildverarbeitung, Digitaler Signalprozessor (DSP), Elektrische Messtechnik, Embedded Linux, ModelSim (Mentor Graphics), Signalverarbeitung

Senior FPGA Developer, Senior System Architect Embedded Systems
International established Company (Headquarter in, Deutschland
12/2019 – 6/2021 (1 Jahr, 7 Monate)
High-Tech- und Elektroindustrie
Tätigkeitszeitraum

12/2019 – 6/2021

Tätigkeitsbeschreibung

I was responsible Senior System Architect for Embedded Systems and Embedded Processing. My task was to evaluate, specify, and implement Embedded Processing Systems for Signal, Video, and Image Processing applications based on FPGAs, SoCs, and GPUs including peripheral camera and sensor systems. Furthermore I specified and implemented customized Signal and Image Processing algorithms for computer vision and pulse processing (timing, energy, pileup) device features.

Eingesetzte Qualifikationen

Bildverarbeitung, C++, CUDA, Elektrische Messtechnik, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Linux, Embedded Systems, Field Programmable Gate Array (FPGA), MATLAB / Simulink, Mikrocontroller, Mikroelektronik, ModelSim (Mentor Graphics), Projektleitung / Teamleitung (IT), Signalverarbeitung, Verilog HDL, VHDL (VHSIC Hardware Description Language)

FPGA Developer, Software Developer, System Architect
Universität Leipzig, University of North Texas, Denton (USA)
4/2015 – 3/2018 (3 Jahre)
Hochschulen und Forschungseinrichtungen
Tätigkeitszeitraum

4/2015 – 3/2018

Tätigkeitsbeschreibung

I developed for my customer an innovative fully digitale scientific measuring instrument for nuclear application. For this digital data acquisition system for ion beam analysis I developed new SuperSampleRate IIR FIR Filter designs in FPGAs to achieve improved energy (amplitude) resolution for pulse processing.

Eingesetzte Qualifikationen

C#, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Systems, Field Programmable Gate Array (FPGA), Ingenieurwissenschaft, Mikroelektronik, ModelSim (Mentor Graphics), Naturwissenschaft, Signalverarbeitung, Technische Informatik, Verilog HDL, VHDL (VHSIC Hardware Description Language)

FPGA Developer, System architect digital Hardware (Festanstellung)
Carl Zeiss Microscopy GmbH, Jena
10/2012 – 11/2019 (7 Jahre, 2 Monate)
High-Tech- und Elektroindustrie
Tätigkeitszeitraum

10/2012 – 11/2019

Tätigkeitsbeschreibung

As System Architect digital Hardware for digital Microscopes, I was responsible for architecture concept and development of FPGA and embedded designs for Signal, Video, and Image Processing in the fully digital microscope "Smartzoom 5". In parallel, I held the position of sub-project management of electronics to lead an internal team of developers and coordinated external development partners in international projects. I contributed in the development of the laser scanning microscopes "LSM 880" and "LSM 980", where I transferred user-specific algorithms into high-performance FPGA implementations.

Eingesetzte Qualifikationen

Bildverarbeitung, C#, C++, Elektrische Messtechnik, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Linux, Embedded Systems, Field Programmable Gate Array (FPGA), Mikroelektronik, ModelSim (Mentor Graphics), Projektleitung / Teamleitung (IT), Signalverarbeitung, Technische Informatik, Verilog HDL, VHDL (VHSIC Hardware Description Language)

FPGA Developer, Software Developer, System Architect
CERN (ISOLDE Laboratory), Geneva
5/2012 – 3/2015 (2 Jahre, 11 Monate)
Hochschulen und Forschungseinrichtungen
Tätigkeitszeitraum

5/2012 – 3/2015

Tätigkeitsbeschreibung

I developed for my customer an innovative fully digitale scientific measuring instrument for nuclear application. For this digital TDPAC spectrometer I developed new SuperSampleRate IIR FIR Filter designs in FPGAs to achieve improved time resolution for pulse processing.

Title: [...]

Link to TDPCA spectrometer:
-Hyperlink entfernt-

Link to the data acquisition system for ion beam analysis:
-Hyperlink entfernt-

Link to the doctoral thesis:
-Hyperlink entfernt-

Eingesetzte Qualifikationen

Charakterdesign, Art direction, C#, C++, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Systems, Field Programmable Gate Array (FPGA), Ingenieurwissenschaft, Mikroelektronik, ModelSim (Mentor Graphics), Naturwissenschaft, Signalverarbeitung, Technische Informatik, Verilog HDL, VHDL (VHSIC Hardware Description Language)

FPGA Design and Software Developer (Festanstellung)
Trimble, Halle (Saale)
1/2008 – 9/2012 (4 Jahre, 9 Monate)
High-Tech- und Elektroindustrie
Tätigkeitszeitraum

1/2008 – 9/2012

Tätigkeitsbeschreibung

In the field of 3D laser scanning (lidar) I developed and tested the SoC system architecture and high performance FPGA/CPLD designs for signal and data processing. Additionally I developed Hardware close software executed by microcontrollers.
I contributed in the development of the 3D Laser Scanning devices "Trimble CX" and "Trimble TX8".

Eingesetzte Qualifikationen

Bildverarbeitung, C++, Elektrische Messtechnik, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Linux, Embedded Systems, Field Programmable Gate Array (FPGA), MATLAB / Simulink, Mikroelektronik, ModelSim (Mentor Graphics), Signalverarbeitung, Technische Informatik, Verilog HDL, VHDL (VHSIC Hardware Description Language)

Ausbildung

Doctorate Computer Engineering
Doctoral Degree
2018
Leipzig (GERMANY)
Physics
Bachelor of Science
2008
Leipzig (GERMANY)
Computer Science
German Diplom
2008
Leipzig (GERMANY)

Über mich

As an enthusiastic FPGA developer, system architect, technical team leader and software developer I support you in your projects in industry and science worldwide. Together with you I would like to overcome the last troubles of your project. In this way we achieve a prosperous cooperation.

For further information please visit my website: -Hyperlink entfernt-

Weitere Kenntnisse

FPGA Synthesis: Xilinx (Virtex, Kintex, Artix, Zynq Ultrascale+, ...), Intel (Stratix, Cyclon), Lattice (MachXO2), Microsemi

FPGA Simulation: Mentor Graphics ModelSim, QuestaSim

Image and Video Processing: DeBayer, ISP, Dead pixel correction, HDR, Image stabilization, Distortion correction, Pixel Shift operation, Color correction, Autofocus, Image sharpness, EDoF, FFT, FWT, Image quality enhancement, Processing pipeline

Signal Processing: digital filters, FIR, IIR, SuperSampleRate filter, SubSample timing, high resolution signal measurement, noise shaping, oversampling

Hardware description language: VHDL, HLS, Verilog

Software Development: MS Visual Studio, GCC, CUDA, Embedded Linux

Programming languages: C#, C++, C, Assembler

Programming environments: MATLAB, Python

Interfaces and Connections: PCI, PCIe, LVDS, MIPI, HDMI, MGT, CAN, I²C, USB, Ethernet, DDR-SDRAM, SRAM, JESD, GigaSample ADC

Sensors: Image Sensors (CCD, CMOS, ISP), Distance Sensors, Acceleration Sensors, Temperature Sensors

Persönliche Daten

Sprache
  • Deutsch (Muttersprache)
  • Englisch (Fließend)
Reisebereitschaft
Weltweit
Arbeitserlaubnis
  • Europäische Union
Profilaufrufe
2847
Alter
41
Berufserfahrung
16 Jahre und 3 Monate (seit 01/2008)
Projektleitung
4 Jahre

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