Senior FPGA/ASIC/SoC Expert, Functional Verification, Embedded SW-Development, Algorithm Design (Image Processing, Mobile...
- Verfügbarkeit einsehen
- 2 Referenzen
- 105€/Stunde
- Bayern
- Weltweit
- de | en | fr
- 07.06.2025
Kurzvorstellung
Qualifikationen
Projekt‐ & Berufserfahrung
1/2024 – offen
Tätigkeitsbeschreibung
FPGA SIL3 Safety Architecture, multi-sensor data acquisition and sensor fusion (IEC 61508-2)
Multi-sensor data acquisition, sensor fusion, IEC 61508-2, Intel Cyclone 10LP
FPGA, Hardwarebeschreibungssprache, Python, Quartus (Altera)
9/2023 – offen
Tätigkeitsbeschreibung
FPGA Architecture of low latency and high speed ASIL-D image processing SoC.
FPGA Architecture, multi-camera image processing and sensor fusion to environmental model, high-speed interfacing, ISO 26262), Xilinx Zynq Ultrascale+ MPSoC
FPGA, ARM-Architektur, Hardwarebeschreibungssprache, Iso 26262, Vivado (Xilinx)
5/2023 – 5/2024
TätigkeitsbeschreibungConcept and HDL implementation and verification of complex low-latency algorithms (Cordic, warping, complex gamma, complex division, polyphase filters) AXI based multi-user memory access, AMD Artix Ultrascale+
Eingesetzte QualifikationenFPGA, Hardwarebeschreibungssprache, Python, Software Architecture, Vivado (Xilinx)
11/2022 – 7/2023
Tätigkeitsbeschreibung
Resource efficient real-time Rectifier Algorithm for small FPGA
Algorithm development, VHDL implementation, Verification
FPGA, Mentor Graphics, Python, Hardwarebeschreibungssprache
6/2021 – 7/2024
Tätigkeitsbeschreibung
FPGA Architecture of large image processing SoC
FPGA Architecture, high-speed image processing and sensor fusion, high-speed interfacing, IEC62304 (Medical Engineering), Xilinx Zynq SoC
Enterprise Architect (EA), FPGA, Hardwarebeschreibungssprache, Mentor Graphics, Python, Vivado (Xilinx), Xilinx (allg.)
6/2021 – 3/2022
Tätigkeitsbeschreibung
Efficient real-time Zstd Compression Algorithm Module for small FPGA
Concept, design and implementation of a ZSTD compressor IP Core using VHDL and Python
FPGA, Python, Hardwarebeschreibungssprache
1/2020 – 10/2020
Tätigkeitsbeschreibung
FPGA architecture and implementation of LIDAR and multi-camera-based 3D environment scanner
Design, implementation and verification of image processing and sensor fusion modules
High-speed interfacing
Linux device driver adaption
Embedded Entwicklung / hardwarenahe Entwicklung, FPGA, Microsemi (allg.), Hardwarebeschreibungssprache, C++, Python
12/2018 – 12/2019
TätigkeitsbeschreibungFPGA architecture and implementation of lidar, camera and IMU (SLAM) based 3D environment scanner, adaption of Linux device drivers
Eingesetzte QualifikationenEmbedded Linux, FPGA, Microsemi (allg.), Verilog, Hardwarebeschreibungssprache
6/2018 – 11/2018
TätigkeitsbeschreibungFPGA architecture and implementation of welding current source controlling FPGA
Eingesetzte QualifikationenFPGA
1/2018 – 7/2018
TätigkeitsbeschreibungDesign and development of Python 3 and Oracle based testsuite for automotive training data annotation tools
Eingesetzte QualifikationenOracle Database, Python
9/2017 – 4/2018
Tätigkeitsbeschreibung
Test system for production end-of-line tests of cryptographic UDP/TCC/IP packet filters (firewall)
Concept of end of line testing
Python implementation of test system
Test engineering
Testdesign (IT), Python
8/2017 – 9/2017
TätigkeitsbeschreibungDesign of suitable stereo image processing algorithms and system on a chip (SoC) system architecture
Eingesetzte QualifikationenFPGA, Vivado (Xilinx), Computer Vision, Simulink, Embedded Software
7/2017 – 11/2018
TätigkeitsbeschreibungCustomer Project Management of international data annotation project
Eingesetzte QualifikationenProjektleitung / Teamleitung (IT)
5/2017 – 8/2017
TätigkeitsbeschreibungProject Management for large international Team (3 Locations, 120 employees)
Eingesetzte QualifikationenProjektleitung / Teamleitung (IT)
3/2017 – 8/2017
Tätigkeitsbeschreibung
Integration of LL-JPEG Encoder in VHDL frame grabber design
FPGA Test Framework
FPGA, Microsemi (allg.), Computer Vision
4/2016 – 3/2017
Tätigkeitsbeschreibung
Architecture of algorithmic SoC in multi-camera based ADAS System
ADAS multi vision algorithm design and implementation
FPGA test framework
FPGA, Vivado (Xilinx), C++, Python, Automotive functional safety professional (AFSP), Embedded Software, Iso 26262
4/2015 – 7/2016
Tätigkeitsbeschreibung
Radar Algorithm Test Management
Code Reviews, Test Reviews, Verification Planning, Validation (1mio km) planning, Issue Tracking, Test Coverage, Requirements Coverage, Algo Integration Tests, Static/Dynamic White and Black Box Tests, Test Metrics, Functional Safety Validation (ISO 26262)
Testdesign (IT), Test Management, Python, Iso 26262
9/2012 – 3/2015
Tätigkeitsbeschreibung
FPGA / ASIC Implementation of Stereo Image Camera based Driver Assistance Sensor
Stereo Vision algorithm design
C++ SW reference model implementation
VHDL testbench framework
HW emulation
Implementation and test of safety mechanisms
FPGA, Hardwarebeschreibungssprache, Lithografie, Simulink
9/2011 – 8/2012
Tätigkeitsbeschreibung
FPGA implementation of stereo vision ADAS camera sensor modules
Software reference model implementation
BFM testbench framework
Testcase definition and VHDL implementation
Module and regression tests
Hardwarebeschreibungssprache, Lithografie, C++, Simulink
8/2010 – 7/2011
Tätigkeitsbeschreibung
Model based design of FPGA GSM/UMTS mobile communication modules
Digital communication algorithm design (OFDM, PSK, GSM, UMTS)
Simulink, Nachrichtentechnik
12/2009 – 7/2010
Tätigkeitsbeschreibung
Specification and implementation of a SoC HW/SW-Controller
Software defined radio
Model-based design
Algorithm design
FPGA implementation
Requirements engineering
FPGA, Hardwarebeschreibungssprache, Simulink, Requirement Analyse, Nachrichtentechnik
5/2007 – 11/2009
Tätigkeitsbeschreibung
Design and implementation of MIMO Powerline OFDM communication system
Algorithm design (OFDM channel estimation)
Model-based algorithm design
FPGA Implementation
FPGA, Lithografie, C++, Linux Entwicklung, Simulink, Python, Nachrichtentechnik
Ausbildung
Online
Online
Kornwestheim
Stuttgart
Stuttgart
Über mich
Amongst others:
High speed imaging
What I did: FPGA Architecture Lead of distributed multi SoC system, high-speed interfacing, image processing pipelines, scheduling, verification, reviews
Products: NextGenRS – Next Generation Refractive Surgery (WaveLight GmbH, Erlangen)
LIDAR, multi-camera and IMU sensor fusion
What I did: FPGA Architecture (LVDS, AMBA bus (AXI4, AHBL, APB3), MIPI CSI-2 camera interfacing, image processing pipelines), scheduling, high-speed interfacing, verification, embedded SW development, adaption of Linux device drivers
Products: e.g. BLK2Go / BLK247 / BLKNow (Leica Geosystems AG, Schweiz)
High level synthesis of OpenCV library to be available on FPGA
What I did: Optimization and consultation, development partnership
Products: AuvizCV IP Core Library (Xilinx Inc.)
SoC multi camera image processing (features, stitching)
What I did: Architecture (Mipi, AXI4), image processing algorithm design (Matlab/C++ to VHDL), SoC implementation, embedded Linux device driver development
Products: e.g. SMR ECU Gen 2 (SMR Samvardhana Motherson Reflectec GmbH, Stuttgart)
FPGA/ASIC stereo vision (rectification, optical flow, disparity maps, feature/object detection)
What I did: Architecture, scheduling, algorithm implementation (C++ to VHDL), verification
Products: e.g. MFC 300/430 Multi-Function Stereo Camera (Continental AG, Lindau)
LTE, UMTS and GSM EDGE mobile communication OFDM MIMO baseband
What I did: Algorithm design, model-based FPGA implementation (Xilinx System Generator), verification
Products: Proof of concepts, demonstrators (Alcatel Lucent, Sony)
Persönliche Daten
- Deutsch (Muttersprache)
- Englisch (Fließend)
- Französisch (Grundkenntnisse)
- Europäische Union
- Schweiz
Kontaktdaten
Nur registrierte PREMIUM-Mitglieder von freelance.de können Kontaktdaten einsehen.
Jetzt Mitglied werden