Projekt‐ & Berufserfahrung
7/2013 – 5/2016Tätigkeitsbeschreibung
• FPGA implementation of various error-correction schemes as well as cryptographic mechanisms such as Reed-Muller, GRACE, Reed-Solomon, CRC and repetition in VHDL.
• Hardware/ Software Co-Design for PUF-based security solutions on the Xilinx Zynq-7000 board.
• Hardware Design, implementation and evaluation of a PUF noise behaviour emulator in VHDL on the Xilinx Kintex-7 FPGA board.
• Design, implementation and synthesis of a random number generator based on Galois-LFSR in VHDL on the Virtex-5 FPGA board using Xilinx ISE and UART peripheral interface to display the output.
• Design, Implementation and Evaluation of the Multiple Ring Oscillator TRNG (MURO-TRNG) in VHDL on the Kintex-7 FPGA board using Xilinx PlanAhead and FPGA Editor.
Embedded Entwicklung / hardwarenahe Entwicklung, VHDL (VHSIC Hardware Description Language), Xilinx (allg.), ModelSim (Mentor Graphics), Vivado (Xilinx), Xilinx ISE (Integrated Synthesis Environment), Field Programmable Gate Array (FPGA), Objective-C
Ort: Linköping, SWEDEN
Ort: Lahijan, IRAN
During the course of my employment, I have gained a considerable knowledge in all aspects of FPGA Design and Verification of various error-correction schemes as well as cryptographic mechanisms in VHDL. Also working at TECHNIKON gave me the opportunity to participate in several European Union’s FP7 projects such as HINT, MAMMOET, MATTHEW and ACDC as well as H2020 projects such as HECTOR and ADMONT as a Hardware security researcher in cooperation with the well-known companies and universities such as Infineon, Ericsson, IMEC and KU Leuven.